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fn8743 rev 1.00 page 1 of 13 february 2, 2016 fn8743 rev 1.00 february 2, 2016 isl9120ir compact high efficiency low power buck-boost regulator datasheet the isl9120ir is a highly integrated buck-boost switching regulator that accepts input voltages either above or below the regulated output voltage. this regulator automatically transitions between buck and b oost modes without significant output disturbance. the isl9120ir also has automatic bypass functionality for when the input voltage is generally within 1% to 2% of the output voltage, there will be a direct bypass connection between the vin and vo ut pins. in addition to the automatic bypass functionality, the isl9120ir also has a forced bypass functionality with the use of the byps pin. this device is capable of delivering up to 800ma of output current (v in = 2.5v, v out = 3.3v) and provides excellent efficiency due to its adaptive current limit pulse frequency modulation (pfm) control architecture. the isl9120ir is designed for stand-alone applications and supports a 3.3v fixed output voltage or variable output voltages with an external resi stor divider. the forced bypass power saving mode can be chosen if voltage regulation is not required. the device consumes less than 3.5a of current over the operating temperature range in the forced bypass mode. the isl9120ir requires only a single inductor and very few external components. power supply solution size is minimized by a 3mmx3mm 12 ld tqfn package. features ? accepts input voltages above or below regulated output voltage ? automatic bypass mode functionality ? automatic and seamless transitions between buck and boost modes ? input voltage range: 1.8v to 5.5v ? selectable forced bypass power saving mode ? adaptive multilevel current limit scheme to optimize efficiency at low and high currents ? output current: up to 800ma (v in = 2.5v, v out = 3.3v) ? high efficiency: up to 98% ? 41a quiescent current maxi mizes light-load efficiency ? fully protected for over-temperature and undervoltage ? small 3mmx3mm 12 ld tqfn package applications ? smartphones and tablets ? portable consumer and wearable devices figure 1. typical fixed output application figure 2. efficiency: v out = 3.3v, t a = +25c v out = 3.3v vout fb c 2 22f or 47f vin v in = 1.8v to 5.5v c 1 10f isl9120irnz gnd pgnd lx1 lx2 l 1 1h en byps bypass buck-boost enable disable 70 75 80 85 90 95 100 1 10 100 1000 output current (ma) efficiency (%) v in = 3.6v v in = 3.4v v in = 4v v in = 2.5v v in = 3v
isl9120ir fn8743 rev 1.00 page 2 of 13 february 2, 2016 block diagram pin configuration isl9120ir (12 ld 3x3 tqfn) top view figure 3. block diagram voltage comparator vin pfm control pvin monitor lx1 v ref vref reverse current vout a2 a1 c1 lx2 gate drivers at anti- shoot thru thermal shutdown current detect c2 b2 c3 fb pgnd b3 gnd en en en vout clamp voltage prog. en soft discharge b1 ilim current comparator a3 byps + + + - - - 9 8 7 12 11 10 4 5 6 1 2 3 lx2 pgnd lx1 en gnd byps lx2 vout fb lx1 vin vin epad pin descriptions pin number pin name description 1, 12 lx2 inductor connection, output side. 2 pgnd power ground for high switching current. 3, 4 lx1 inductor connection, input side. 5, 6 vin power supply input. range: 1.8v to 5.5v. connect 1x 10f capacitor to pgnd. 7 byps bypass mode enable pin. high for bypass mode. low for buck-boost mode. 8gndanalog ground pin. 9 en logic input, drive high to enable device. 10 fb voltage feedback pin. 11 vout buck-boost output. connect 22f or 47f capacitor to pgnd.
isl9120ir fn8743 rev 1.00 page 3 of 13 february 2, 2016 ordering information part number ( notes 1 , 2 , 3 ) part marking vout (v) temp range (c) package (rohs compliant) pkg. dwg. # isl9120irtaz 120a adj. -40 to +85 12 ld 3x3 tqfn l12.3x3a isl9120irtnz 120n 3.3 -40 to +85 12 ld 3x3 tqfn l12.3x3a isl9120irn-evz evaluation board for isl9120irnz ISL9120IRA-EVZ evaluation board for isl9120iraz notes: 1. add ?-t*? suffix for 3k unit tape and reel. please refer to tb347 for details on reel specifications. 2. these intersil pb-free plastic packaged products employ spec ial pb-free material sets, molding compounds/die attach materials , and 100% matte tin plate plus anneal (e3 termination finish , which is rohs compliant and compatible wi th both snpb and pb-free soldering opera tions). intersil pb-free products are msl classified at pb-fr ee peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jed ec j std-020. 3. for moisture sensitivity level (msl), please see product information page for isl9120 . for more information on msl, please see tech brief tb363 . figure 4. key differences between family of parts isl9120 isl9120ir buck-boost regulation yes yes bypass yes yes package 1.41x1.41mm 9-bump wlcsp 3x3mm 12ld tqfn
isl9120ir fn8743 rev 1.00 page 4 of 13 february 2, 2016 absolute maximum rating s thermal information vin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.5v lx1, lx2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.5v fb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.5v gnd, pgnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 0.3v all other pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.5v esd rating human body model (tested per jesd22-a114f) . . . . . . . . . . . . . . .2.5kv machine model (tested per jesd22-a115c) . . . . . . . . . . . . . . . . . 200v charged device model (tested per jesd22-c101f). . . . . . . . . . . . . . 2kv latch-up (tested per jesd78d; class 2) . . . . . . . . . . . . . . . . . . . . . . 100ma thermal resistance (typical) ? ja (c/w) ? jc (c/w) 3x3 tqfn ( notes 4 , 5 ) . . . . . . . . . . . . . . . . . 55 5 maximum junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+125c storage temperature range. . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see tb493 recommended operating conditions temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40c to +85c supply voltage (v in ) range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8v to 5.5v load current (i out ) range (dc) . . . . . . . . . . . . . . . . . . . . . . . . 0a to 800ma caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 4. ? ja is measured in free air with the componen t mounted on a high effective thermal conduc tivity test board with ?direct attach? fe atures. see tech brief tb379 . 5. for ? jc , the ?case temp? location is the center of the exposed metal pad on the package underside. analog specifications v in = v en = 3.6v, v out = 3.3v, l 1 = 1h, c 1 = 10f, c 2 = 47f, t a = +25c. boldface limits apply across the recommended operating temperature range, -40c to +85c and input voltage range (1.8v to 5.5v). symbol parameter test conditions min ( note 6 )typ max ( note 6 )unit power supply v in input voltage range 1.8 5.5 v v uvlo v in undervoltage lockout threshold rising 1.725 1.790 v falling 1.550 1.650 v i vin vin supply current v out = 3.7v ( note 7 )41 55 a i sd vin supply current, shutdown en = gnd 0.005 1 a i byp vin supply current, bypass mode byps = logic high, v in 5v 0.8 3.5 a output voltage regulation v out output voltage range isl9120iraz, i out = 100ma 1.00 5.20 v output voltage accuracy v in = 3.7v, i out = 1ma -3 +4 % v fb fb pin voltage regulation for adjustable output version (isl9120iraz) 0.80 v i fb fb pin bias current for adjustable output version (isl9120iraz) 0.025 a ? v out / ? v in line regulation, 500ma i out = 500ma, v out = 3.3v, v in step from 2.3v to 5.5v 0.00681 mv/mv ? v out / ? i out load regulation, 500ma v in = 3.7v, v out = 3.3v, i out step from 0ma to 500ma 0.0072 mv/ma ? v out / ? v i line regulation, 100ma i out = 100ma, v out = 3.3v, v in step from 2.3v to 5.5v 0.00273 mv/mv ? v out / ? i out load regulation, 100ma v in = 3.7v, v out = 3.3v, i out step from 0ma to 100ma 0.05 mv/ma v clamp output voltage clamp rising 5.32 5.82 v output voltage clamp hysteresis 400 mv dc/dc switching specifications i pfetleak lx1 pin leakage current -0.05 +0.05 a i nfetleak lx2 pin leakage current v in = 3.6v -0.05 +0.05 a
isl9120ir fn8743 rev 1.00 page 5 of 13 february 2, 2016 soft-start and soft discharge t ss soft-start time time from when en signal asserts to when output voltage ramp starts. 1ms time from when output voltage ramp starts to when output voltage reaches 95% of its nominal value with device operating in buck mode. v in = 4v, i out = 500ma 1ms time from when output voltage ramp starts to when output voltage reaches 95% of its nominal value with device operating in boost mode. v in = 3v, i out = 500ma 1ms r dischg v out soft-discharge on-resistance en < v il 110 power mosfet r dson_p p-channel mosfet on-resistance i out = 200ma, measured with internal test mode 63 m r dson_n n-channel mosfet on-resistance i out = 200ma, measured with internal test mode 63 m inductor peak current limit i lim_max maximum peak current limit 2a thermal protection thermal shutdown 150 c thermal shutdown hysteresis 35 c logic inputs i leak input leakage 0.013 0.500 a v ih input high voltage 1.4 v v il input low voltage 0.4 v notes: 6. parameters with min and/or max limits are 100% tested at +25c , unless otherwise specified. te mperature limits established by characterization and are not production tested. 7. quiescent current measurements are taken when the output is not switching. analog specifications v in = v en = 3.6v, v out = 3.3v, l 1 = 1h, c 1 = 10f, c 2 = 47f, t a = +25c. boldface limits apply across the recommended operating temperature range, -40c to +85c and input voltage range (1.8v to 5.5v). (continued) symbol parameter test conditions min ( note 6 )typ max ( note 6 )unit
isl9120ir fn8743 rev 1.00 page 6 of 13 february 2, 2016 typical performance curves figure 5. output voltage vs load current figure 6. quiescent current vs input voltage (en = high) figure 7. soft-start (v in = 4v, v out = 3.3v, no load) figure 8. soft-start (v in = 4v, v out = 3.3v, 0.5a r load ) figure 9. soft-start (v in = 3v, v out = 3.3v, no load) figure 10. soft-start (v in = 3v, v out = 3.3v, 0.5a r load ) -2.0 -1.5 -1.0 -0.5 0 0.5 1.0 1.5 1 10 100 1000 output current (ma) ? v out (%) v in = 3.6v v in = 4v v in = 2.5v v in = 3v 50 55 60 65 70 75 80 85 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 v in (v) quiescent current (a) en (2v/div) v out (1v/div) i l (500ma/div) 400s/div 400s/div i l (500ma/div) v out (1v/div) en (2v/div) en (2v/div) v out (1v/div) i l (500ma/div) 400s/div 400s/div en (2v/div) v out (1v/div) i l (500ma/div)
isl9120ir fn8743 rev 1.00 page 7 of 13 february 2, 2016 figure 11. 0a to 0.5a load transient (v in = 4v, v out = 3.3v) figure 12. bypass functionality (v in = 4v, v out = 3.3, 0.5a r load ) figure 13. bypass functionality (v in = 3v, v out = 3.3, 0.5a r load ) typical performance curves (continued) 200s/div v out (ac, 100mv/div) i load (200ma/div) v in (1v/div) v out (1v/div) i l (1a/div) v byp (2v/div) 400s/div 400s/div v byp (2v/div) v out (1v/div) v in (1v/div) i l (1a/div)
isl9120ir fn8743 rev 1.00 page 8 of 13 february 2, 2016 functional description functional overview refer to the ? block diagram ? on page 2 . the isl9120ir implements a complete buck-boost switching regulator with a pfm controller, internal switches, references, protection circuitry and control inputs. the pfm controller automatically switches between buck and boost modes as necessary to maintain a steady output voltage with changing input voltages and dynamic external loads. internal supply and references referring to the ? block diagram ? on page 2 , the vin pin supplies input power to the dc/dc converter and also provides the operating voltage source required for stable v ref generation. separate ground pins (gnd and pgnd) are provided to avoid problems caused by ground shift due to the high switching currents. enable input a master enable pin, en, allows the device to be enabled. driving en logic low invokes a power-down mode, where most internal device functions, including input and output power-good detection, are disabled. bypass input the byps pin allows the device to provide a direct connection from the vin pin to the vout pin. the connection between the vin and vout pins is through the external inductor and two internal power transistors. this function, called forced bypass mode operation, provides a very low quiescent current state. for forced bypass mode operation, the minimum time required while in forced bypass operatio n is 800s. also when exiting forced bypass operation, the mi nimum time required before reentering forced bypass mode operation is 1ms. soft discharge when the device is disabled by dr iving en logic low, an internal resistor between the vout and gnd pins is activated. this internal resistor has a typical resistance of 110 . por sequence and soft-start bringing the en pin logic high allows the device to power-up. a number of events occur during th e start-up sequence. the internal voltage reference powers up and st abilizes. the device then starts operating. there is a 1ms (typical ) delay between assertion of the en pin and the start of the switching regulator soft-start ramp. the soft-start feature minimizes output voltage overshoot and input inrush currents. during soft -start, the reference voltage is ramped to provide a ramping output voltage. when the target output voltage is higher than the input voltage, there will be a transition from buck mode to boost mode during the soft-start sequence. at the time of this transition, the ramp rate of the reference voltage is decreased, such that the output voltage slew rate is decreased. this provides a slower output voltage slew rate. undervoltage lockout the undervoltage lockout (uvlo) feature prevents abnormal operation in the event that the supply voltage is too low to guarantee proper operation. when the vin pin voltage falls below the uvlo threshold, the regulator is disabled. thermal shutdown a built-in thermal protection feature protects the isl9120ir if the die temperature reaches +150c (typical). at this die temperature, the regulator is completely shut down. the die temperature continues to be monitored in this thermal shutdown mode. when the die temperature falls to +115c (typical), the device will resume normal operation. when exiting thermal shutdown, the isl9120ir will execute its soft-start sequence. buck-boost conversion topology the isl9120ir operates in either buck or boost mode. when operating in conditions where v in is close to v out , the isl9120ir alternates between buck mode, boost mode and automatic bypass modes of operation as ne cessary to provide a regulated output voltage. figure 14 shows a simplified diagram of the internal switches and external inductor. pfm operation during pfm operation in buck mo de, switch d is continuously closed and switch c is continuous ly open. switches a and b operate in discontinuous mode during pfm operation. during pfm operation in boost mode, the isl9120ir clos es switch a and switch c to ramp-up the current in the inductor. when inductor current reaches the current limit, the device turns off switches a and c, then turns on switches b and d. with switches b and d closed, output voltage increases as the inductor current ramps down. as shown in figure 15 on page 9 , depending on output current, there will be multiple pfm pulses to charge up the output capacitor. these pulses continue until v out has reached the upper threshold of the pfm hysteretic, which is at 1.5% above the nominal output voltage. switching then stops and remains stopped until v out decays to the lower threshold of the voltage hysteretic, which is the nominal output voltage. then the pfm operation repeats. figure 14. buck-boost topology vin vout switch a switch d switch b switch c lx1 lx2 l 1
isl9120ir fn8743 rev 1.00 page 9 of 13 february 2, 2016 variable peak current limit scheme to optimize efficiency across the output current range, the isl9120ir implements a multi-level current limit scheme with 32 levels between 350ma and 2a. the transition from one level to the other is determined by the number of pulses in a pfm burst (pulse count) as shown in figure 16 . at a given peak current limit level, the pulse count increases as the output current increases. when the pulse count reaches the upper threshol d at the existing current limit, the current limit will switch to the ne xt higher level. similarly, if the pulse count reaches the lower threshol d at the existing current limit, the device will switch to the next lower level of peak current limit. if the pulse count reaches the upper threshold at the highest current limit, the current limit will not rise any further. increasing the output current beyond this point may cause the output to lose voltage regulation. figure 15. pfm mode operation concept figure 16. peak current li mit step up transition i l v out 0 peak current limit 1.015 * v out _nominal v out _nominal i l i out 0 i pk_lmt2 i pk_lmt1 increasing i out t min
isl9120ir fn8743 rev 1.00 page 10 of 13 february 2, 2016 automatic bypass mode operation when the output voltage is close to the input voltage, generally within 1% to 2%, the isl9120ir will engage automatic bypass mode operation, which produces a direct connection between the vin and vout pins. this behavior provides excellent efficiency and very low output voltage ripple. forced bypass mode operation forced bypass mode operation is intended for applications where the output regulation is not important but the device quiescent current consumption is importan t. one example is when the buck-boost regulator is providing power to a ldo and the ldo is in standby mode with near zero output current. under this condition, putting the buck-boost regulator in the bypass mode will have essentially no impact on the ldo but save the 41a quiescent current consumption on the buck-boost regulator. since the bypass mode is an extreme power saving mode, there is no overcurrent protection. therefore, caution must be taken not to overload or short-circuit the device. power-up in the bypass mode is not recommended. output voltage programming the isl9120ir is available in fixed and adjustable output voltage versions. to use the fixed output version (isl9120irnz), the vout pin must be connected directly to the fb pin. in the adjustable output voltage version (isl9120iraz), an external resistor divider is required to program the output voltage. applications information component selection the fixed-output version (isl9120irnz) requires only three external power components to implement the buck-boost converter: an inductor, an input capacitor and an output capacitor. the adjustable version (isl9120ir az) requires three additional components to program the output voltage. two external resistors program the output vo ltage and a small capacitor is added to improve transient response. output voltage prog ramming, adjustable version setting and controlling the output voltage of the isl9120iraz (adjustable output version) can be accomplished by selecting the external resistor values. equation 1 can be used to derive the r 1 and r 2 resistor values: when designing a pcb, include a gnd guard band around the fb resistor network to reduce noise and improve accuracy and stability. resistors r 1 and r 2 should be positioned close to the fb pin. the suggested value of the r 1 resistor is 187k. feed-forward capacitor selection a small capacitor (c 4 in figure 17 ) in parallel with resistor r 1 is required to provide the specified load and line regulation. the suggested value of this capacitor is 22pf for r 1 =187k. an npo type capacitor is recommended. non-adjustable version fb pin connection the fixed output version of the isl9120ir does not require external resistors or a capacitor on the fb pin. simply connect vout to fb, as shown in figure 18 . v out = 3.3v vout fb c 2 47f r 1 r 2 187k 60.4k vin v in = 1.8v to 5.5v en byps c 1 10f isl9120iraz gnd pgnd lx1 lx2 l 1 1h c 4 22pf forced bypass buck-boost enable disable figure 17. typical isl9120iraz application v out 0.8v 1 r 1 r 2 ------ - + ?? ?? ?? ? = (eq. 1) figure 18. typical isl9120irnzapplication v out = 3.3v vout fb c 2 22f or 47f vin v in = 1.8v to 5.5v c 1 10f isl9120irnz gnd pgnd lx1 lx2 l 1 1h en byps bypass buck-boost enable disable
isl9120ir fn8743 rev 1.00 page 11 of 13 february 2, 2016 inductor selection an inductor with high frequency core material (e.g., ferrite core) should be used to minimize core losses and provide good efficiency. the inductor must be able to handle the peak switching currents without saturating. a 1h inductor with 2a saturation current rating is recommended. select an inductor with low dcr to provide good efficiency. in applications where radiated noise must be minimized, a toroidal or shielded inductor can be used. capacitor selection the input and output capacitors sh ould be ceramic x5r type with low esl and esr. the recommended input capacitor value is 10f. the recommended 10f input capacitor should have the following minimum characteri stics: 0603 case size, x5r temperature range and 10v voltage rating. the recommended v out capacitor values are 22f or 47f. the recommended 47f output capacitor should have the following minimum characteristics: 0603 case size, x5r temperature range and 6.3v voltage rating. the recommended 22f output capacitor should have the following minimum char acteristics: 0603 case size, x5r temperature range and 10v voltage rating. recommended pcb layout a correct pcb layout is critical for proper operation of the isl9120ir. the input and output capacitors should be positioned as closely to the ic as possible. the ground connections of the input and output capacitors should be kept as short as possible and should be on the component layer to avoid problems that are caused by high switching currents flowing through pcb vias. table 1. inductor vendor information manufacturer series dimension (mm) dcr (m ) typ i sat (a) typ toko dfe201610r-h- 1r0m 2.0x1.6x1.0 66 2.7 cyntec pife20161t-1r0ms 2.0x1.6x1.0 65 2.8 tdk tfm201610ghm- 1r0mtaa 2.0x1.6x1.0 50 3.8 table 2. capacitor vendor information manufacturer series website avx x5r www.avx.com murata x5r www.murata.com tdk x5r www.tdk.com
fn8743 rev 1.00 page 12 of 13 february 2, 2016 isl9120ir intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description on ly. intersil may modify the circuit design an d/or specifications of products at any time without notice, provided that such modification does not, in intersil's sole judgment, affect the form, fit or function of the product. accordingly, the reader is cautioned to verify that datasheets are current before placing orders. information fu rnished by intersil is believed to be accu rate and reliable. however, no responsib ility is assumed by intersil or its subsidiaries for its use; nor for any infrin gements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com for additional products, see www.intersil.com/en/products.html ? copyright intersil americas llc 2015-2016. all rights reserved. all trademarks and registered trademarks are the property of their respective owners. about intersil intersil corporation is a leading provider of innovative power ma nagement and precision analog so lutions. the company's product s address some of the largest markets within the industrial and infrastr ucture, mobile computing and high-end consumer markets. for the most updated datasheet, application notes, related documentatio n and related parts, please see the respective product information page found at www.intersil.com . you may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask . reliability reports are also av ailable from our website at www.intersil.com/support revision history the revision history provided is for inform ational purposes only and is believed to be accurate, but not warranted. please go t o web to make sure you have the latest revision. date revision change february 2, 2016 fn8743.1 -page 1 - in ?description?, 3rd paragraph changed the value from 1a to 3.5a. -ordering information table on page 3, note1: added ?-t? suffix for 3k unit tape and reel options. -analog specification table changes on page 4 are: under power supply- vin undervoltage lockout threshold, changed max value from 1.775 to 1.79 vin supply current, bypass mode changed typ from 0.035 to 0.8 and max from 1 to 3.5. under output voltage regulation- output voltage accuracy, changed min/max from -2 and +2 to -3 and +4. august 4, 2015 fn8743.0 initial release
isl9120ir fn8743 rev 1.00 page 13 of 13 february 2, 2016 package outline drawing l12.3x3a 12 lead thin quad flat no lead plastic package rev 0, 09/07 located within the zone indicate d. the pin #1 indentifier may b e unless otherwise specified, t olerance : decimal 0.05 tiebar shown (if present) i s a non-functional feature. the configuration of the pin #1 identifier is optional, but mus t be between 0.18mm and 0.30mm from the terminal tip. dimension b applies to the metallized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing c onform to amse y14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: bottom view detail "x" side view typical recommended land pattern top view (4x) 0.15 index area pin 1 a 3.00 b 3.00 6 1 3 7 9 4 6 10 12 pin #1 index area 12x 0 . 4 0 . 1 b 0.10 ma c 4 6 0.25 +0.05 / -0.07 0 . 5 4x 1.45 bsc ( 2 . 8 typ ) ( 1.45 ) 0 . 25 0 . 50 0 . 6 0 . 75 c seating plane base plane 0.08 0.10 see detail "x" c c 0 . 00 min. 0 . 05 max. 0 . 2 ref c 5

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